Monolithic integrated circuits typically have a large number of transistors, such as metal-oxide semiconductor field-effect transistors (MOSFETs) fabricated over a planar substrate, such as a silicon wafer. System-on-a-chip (SoC) architectures use such transistors in both analog and digital circuitry. When high-speed analog circuitry is integrated on a single monolithic structure with digital circuitry, the digital switching can induce substrate noise that limits the precision and linearity of the analog circuitry.
Junction gate field effect transistors (JFETs) are used primarily in analog applications due to the superior low noise performance they offer compared to standard MOSFET (Metal Oxide Semiconductor FET) devices. JFETs are useful in radio frequency devices such as filters and equalizers and also in power circuits for power supplies, power conditioners and the like.
JFET transistors are fabricated in the bulk of a planar process technology using implanted junctions to establish a back-gate, channel, and top-gate electrodes. The JFET is made using implanted n and p-type wells to form the top and back gates, as well as the source and drain contacts. This bulk planar process may be replaced for MOSFET devices using fins formed on the substrate. The formation of FET devices on fins has been referred to as a FinFET architecture.